An ultraviolet-erasable, programmable read only memory (EPROM) is a non-volatile memory integrated circuit that is used to store binary data. The circuit has an array of memory cells, each having at least one transistor, and each capable of storing a bit of data. Power can be removed from the EPROM without loss of data. Upon re-applying power, the stored data may be retrieved.
If an EPROM has already been programmed, it may be erased by exposing it to ultraviolet light. Electrically erasable programmable read-only memories (EEPROMS) permit data to be erased electrically. In the case of a "flash" EEPROM, all data cells are electrically erased in one operation. Flash EEPROMS, like EPROMS, typically have a single-transistor architecture similar to those of EPROMS. For purposes of the description the term "EPROM" will be assumed to include flash EEPROMs.
In addition to its data retention ability, an EPROM may be programmed to store new data. New data is written to the EPROM by deactivating chip select lines to switch to data inputs. Address inputs are set to a starting value, the data is delivered to the data inputs, and the data is written to the cell identified by the address inputs. The address inputs are incremented, and the cycle is repeated for the entire array of cells.
A EPROM and its programming, reading, and erasing is described in U.S. Pat. No. 4,281,397, assigned to Texas Instruments Incorporated. The EPROM described therein is a virtual ground EPROM, in which source lines are connected to a virtual ground during programming.
FIG. 1A illustrates a typical prior art EPROM array. For programming virtual ground EPROMS, a selected row line 15 and selected drain [bit] line 17 are both driven high. They intersect at the memory cell to be written, which is comprised of a single transistor 10. The row line 15 is connected to the transistor gate 14 and the drain [bit] line 17 is connected to the transistor drain 11. A source line 19, connected to the transistor source 12, is held at virtual ground. Non-selected drain lines 17 and source lines 19 are floated. The programming voltages create a high current in the channel region (between source 12 and drain 11) of the selected cell. This results in the generation, near the drain-channel junction of hot electrons, which are injected to the floating gate 13 of the selected cell. The charge injected into the floating gate 13 is trapped there and stored in the cell until erased.
A problem with programming virtual ground EPROMs and flash EEPROMs is the occurrence of disturbances in cells adjacent to the cell that has been currently selected for programming. The disturbance occurs because non selected source lines may take a period of time to charge up. As a result, an unintended charge may occur in the adjacent cell, resulting in the adjacent cell to be in an unintended state or in a state with reduced margin to the unintended state. Circuit techniques have been developed to minimize the disturbs in virtual ground array architectures, adding to design complexity.